library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity micromemoria is
Port ( valorMem : in STD_LOGIC_VECTOR (81 downto 0);
pl: in std_logic;

microinst: out STD_LOGIC_VECTOR (1 downto 0);
prueba: out	STD_LOGIC_VECTOR (3 downto 0);
vf: out std_logic; 
liga : out STD_LOGIC_VECTOR (11 downto 0);
EPC : out STD_LOGIC_VECTOR (2 downto 0);
PC : out STD_LOGIC_VECTOR (2 downto 0);
ERA :  out STD_LOGIC_VECTOR (2 downto 0);
RA : out STD_LOGIC_VECTOR (2 downto 0);
EY :  out STD_LOGIC_VECTOR (2 downto 0);
Y : out STD_LOGIC_VECTOR (2 downto 0);
EX :  out STD_LOGIC_VECTOR (2 downto 0);
X : out STD_LOGIC_VECTOR (2 downto 0);
CBD: out std_logic; 
AS: out std_logic; 
RW : out std_logic; 
CRI : out std_logic; 
CZ : out std_logic; 
CV : out std_logic; 
CC : out std_logic; 
CN : out std_logic; 
B : out STD_LOGIC_VECTOR (8 downto 0);
HB : out std_logic; 
DUPA : out std_logic; 
OEUPA : out std_logic; 
UPA : out STD_LOGIC_VECTOR (9 downto 0);
WA : out std_logic; 
EA : out STD_LOGIC_VECTOR (1 downto 0);
WB : out std_logic; 
EB : out STD_LOGIC_VECTOR (1 downto 0);
selmux : out std_logic; 
selbus : out std_logic;
BD : out std_logic);

end micromemoria;
architecture Behavioral of micromemoria is
begin
process(valorMem,pl)
begin
if(pl='0') 
	then 
	
microinst   <= valorMem(81 downto 80); 
prueba		<= valorMem(79 downto 76);  
vf 			<= valorMem(75); 
liga  		<= valorMem(74 downto 63); 
EPC			<= valorMem(62 downto 60); 
PC				<= valorMem(59 downto 57); 
ERA			<= valorMem(56 downto 54); 
RA				<= valorMem(53 downto 51); 
EY				<= valorMem(50 downto 48);     
Y				<= valorMem(47 downto 45); 
EX				<= valorMem(44 downto 42); 
X				<= valorMem(41 downto 39); 
CBD			<= valorMem(38);
AS				<= valorMem(37); 
RW				<= valorMem(36); 
CRI			<= valorMem(35);  
CZ				<= valorMem(34);  
CV				<= valorMem(33);  
CC				<= valorMem(32);  
CN				<= valorMem(31); 
B				<= valorMem(30 downto 22); 
HB				<= valorMem(21); 
DUPA  		<= valorMem(20);  
OEUPA 		<= valorMem(19);  
UPA   		<= valorMem(18 downto 9);
WA    		<= valorMem(8);  
EA    		<= valorMem(7 downto 6);
WB    		<= valorMem(5);  
EB    		<= valorMem(4 downto 3);
selmux		<= valorMem(2);
selbus		<= valorMem(1);
BD				<= valorMem(0);

	
		
	elsif (pl='1') then
microinst   <= valorMem(81 downto 80); 
prueba		<= valorMem(79 downto 76);  
vf 			<= valorMem(75); 
liga			<= "ZZZZZZZZZZZZ"; 
EPC			<= valorMem(62 downto 60); 
PC				<= valorMem(59 downto 57); 
ERA			<= valorMem(56 downto 54); 
RA				<= valorMem(53 downto 51); 
EY				<= valorMem(50 downto 48);     
Y				<= valorMem(47 downto 45); 
EX				<= valorMem(44 downto 42); 
X				<= valorMem(41 downto 39); 
CBD			<= valorMem(38);
AS				<= valorMem(37); 
RW				<= valorMem(36); 
CRI			<= valorMem(35);  
CZ				<= valorMem(34);  
CV				<= valorMem(33);  
CC				<= valorMem(32);  
CN				<= valorMem(31); 
B				<= valorMem(30 downto 22); 
HB				<= valorMem(21); 
DUPA  		<= valorMem(20);  
OEUPA 		<= valorMem(19);  
UPA   		<= valorMem(18 downto 9);
WA    		<= valorMem(8);  
EA    		<= valorMem(7 downto 6);
WB    		<= valorMem(5);  
EB    		<= valorMem(4 downto 3);
selmux		<= valorMem(2);
selbus		<= valorMem(1);
BD				<= valorMem(0);


end if;
end process;
end Behavioral;